Integrating to reduce

In recent years, different programmable logic devices (FPGAs and CPLDs) manufacturer companies have launched products with a new architecture which is a clear evolution of traditional SoC (System on Chip) FPGA, where the software applications will take an important role in the whole designs.

FPGA SoC architecture integrates a FPGA and other modules within a single package or chip in order to reduce cost and size of the systems. The gradual evolution of FPGA SoC architecture has reached the point of offering a powerful ARM-based hardware processor, many peripherals, standard interfaces (I2C, CAN, GPI, SPI, AMBA …), memory controllers and of course, a FPGA in order to fit the user designs. Moreover, all these components are interconnected by high-bandwidth lines allowing high speed communications.

One of the reasons of the remarkable progress of this technology has been implement in a more suitable way different applications demanded by the market, such as sensor interfaces, communication protocols, communication standards, LTE base stations, security applications, HD video analyzers, image processing and signal processing.
Up to now, the available options in order to integrate software code in the design of programmable devices were:

• Implement a processor with FPGA logic elements, which consume many resources and does not achieve high working frequencies.
• Communicate the FPGA with an independent processor, so it becomes a hard task and the solution is poor in terms of flexibility.
• SoCs that integrate a single processor with the FPGA, whose capacity is not sufficient for the requirements of many applications today.

As it is shown in the figure, the use of embedded processors in FPGA designs has steadily increased over the past decade, and is expected to exceed 50% by the year 2014. Like it was said, this technology make the implementation of multiple applications easier, in addition another important advantage of the evolution of FPGAs SoC architecture is the costs reducing:

• Reduce power consumption due to optimized peripherals and the ability to turn off the FPGA in the silent periods.
• Reduce Time to Market due to the large number of peripherals and interfaces integrated in the same chip; moreover, it adds flexibility to the user.
• Embedded peripherals also leave more free resources for user designs, so it reduces the FPGA required logic elements.

Gradiant is aware of the development and benefits of this architecture,and its application is considered in the development of different projects.